The present invention relates to a semiconductor device and a technique for manufacturing the same and more particularly to a semiconductor device which includes a field effect transistor with a metal gate electrode and a memory cell and a technique useful for manufacturing the same.
Japanese Unexamined Patent Application Publication No. 2016-51745 describes a technique for a semiconductor device which includes a low-height memory cell and a high-height field effect transistor.
Japanese Unexamined Patent Application Publication No. Hei 9(1997)-289298 describes a technique for forming a field effect transistor in each of the upper and lower level areas of a stepped semiconductor substrate.